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lmh188
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lvds-mono-16m
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http://192.168.1.51:8099/hg_fpga/lvds-mono-16m.git
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221
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Verilog
87.4%
VHDL
9.6%
Tcl
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9795616967
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17828169534
9795616967
initial version.
2024-02-19 11:09:38 +08:00
src
initial version.
2024-02-19 11:09:38 +08:00