newtx/hardware/cis/FpgaComm.h

#pragma once
#include <string>
#include <memory>
#include "../uart/regsaccess.h"

#ifdef HAS_UV
#define MAX_REGS 0x0e
#else
#define MAX_REGS 0x10
#endif

typedef struct Frame_FPGA
{
    unsigned short int height;
    unsigned short int num : 8;
    unsigned short int reserved : 8;

} FrameFpga;

typedef struct Mode_FPGA
{
    unsigned short int colorMode : 1;
    unsigned short int dpi : 2;//0x01 200dpi 0x02 300dpi 0x03 600dpi
    unsigned short int led : 1;
    unsigned short sample : 9;
    unsigned short int adcA : 1;
    unsigned short int adcB : 1;
    unsigned short int selftest : 1;
    unsigned short int sp;
} ModeFpga;

typedef struct CMD_FPGA
{
    unsigned int cmd : 1; //start : 1 , stop : 0
    unsigned int reserved : 31;
} CmdFpga;

typedef struct STATUS_FPGA
{
    unsigned int status : 1; //start : 1 , stop : 0
    unsigned int reserved : 31;
} StatusFpga;

typedef struct Ad_Gain
{
    unsigned short int gain_low8 : 8;
    unsigned short int gain_hight : 1;
    unsigned int reserved : 23;  
} AdGain;


typedef struct CIS_AD_Gain
{
    unsigned short int ad0_value : 8;    //!< æ•°æ<C2B0>®ä½?
    unsigned short int ad0_reserved : 2; //!< ä¿<C3A4>ç•™ä½?
    unsigned short int ad0_addr : 5;     //!< 寄存器地å<C2B0>€
    unsigned short int ad0_rw : 1;       //!< 读写� 1:读， 0:�
    unsigned short int ad1_value : 8;    //!< æ•°æ<C2B0>®ä½?
    unsigned short int ad1_reserved : 2; //!< ä¿<C3A4>ç•™ä½?
    unsigned short int ad1_addr : 5;     //!< 寄存器地å<C2B0>€
    unsigned short int ad1_rw : 1;       //!< 读写� 1:读， 0:�
} CisAdGain;

typedef struct CIS_LED_RF
{
    unsigned short int ledEnable : 1;
    unsigned short int fanMode : 2;
    unsigned short int jamEnable : 1;
    unsigned short int sample : 9;
    unsigned short int reserved : 3;
    unsigned short int ledR;
} CisLedRF;

typedef struct CIS_LED_R
{
    unsigned short int ledEnable : 1;
    unsigned short int sample : 9;
    unsigned short int reserved : 6;
    unsigned short int ledR;
} CisLedR;

typedef struct CIS_LED_GB
{
    unsigned short int ledG;
    unsigned short int ledB;
} CisLedGB;

typedef struct CIS_LED_UV
{
    unsigned short int ledASide;
    unsigned short int ledBSide;
} CisLedUv;

typedef union Fpga_Params
{
    struct
    {
        FrameFpga frame;   //0x00
        ModeFpga mode;     //0x01
        CmdFpga cmd;       //0x02
        StatusFpga status; //0x03
        CisAdGain Aad;     //0x04
        CisLedR AledR;     //0x05
        CisLedGB AledGB;   //0x06
        CisAdGain Bad;     //0x07
#ifndef G300
        CisLedRF BledR; //0x08
#else
        CisLedR BledR; //0x08
#endif
        CisLedGB BledGB;        //0x09
        unsigned int ExpIncr;   //0x0a
        unsigned int TrigMode;  //0x0b
        unsigned int DelayTime; //0x0c
        CisLedUv UVLed;
    };
    unsigned int regs[MAX_REGS];
} FpgaParams;

#define FPGA_UART "/dev/ttyUSB0"
#define MOTOR_UART "/dev/ttyS4"

enum
{
    GRAY_MODE = 0,
    COLOR_MODE,
};
enum
{
    DPI_200 = 1,
    DPI_300 = 2,
    DPI_600 = 3,

};

class GpioOut;
class Gpio;

class FpgaComm : public IRegsAccess
{
    int     bauds_ = 921600;
    bool    ok_ = true;

    class controller
    {
        enum ports
        {
            PORT_STATUS = 69,
            PORT_RELOAD = 70,
            PORT_CONFIG = 71,
            PORT_VDD_3VOFF = 96,
            PORT_VDD_5VEN = 98,
            PORT_INIT_DONE = 99,
            PORT_IMAGE_TX = 101,
            PORT_RESET = 232,
        };
        std::unique_ptr<Gpio>       status_;    // status reader        - port 69
        std::unique_ptr<Gpio>       reload_;    // codes reload         - port 70
        std::unique_ptr<Gpio>       cfg_;       // configuration reload - port 71
        std::unique_ptr<Gpio>       reset_;     // circuit reset        - port Fpga_Reset
        std::unique_ptr<Gpio>       vdd_3voff_;
        std::unique_ptr<Gpio>       vdd_5ven_;
        std::unique_ptr<Gpio>       init_done_;
        std::unique_ptr<Gpio>       img_tx_;

    public:
        controller();
        ~controller();

    public:
        void reset(void);
        void reload(void);
    };
    std::unique_ptr<controller>    controller_;

public:
    FpgaComm(int bauds = 921600, bool query = false);
    virtual ~FpgaComm(){}

    enum { CIS_SECTOR_COUNT = 6 };  // how many sectors of ONE CIS

    void reset();
    void regsAccess_reset(bool enable);
    void setRegs(int addr, int value);
    int getRegs(int addr);
    void setFrameHeight(int height);
    int getFrameHeight();
    void setFrameNum(int num);
    void enableLed(bool bEnable);
    void enableUV(bool enable);
    void capture();
    void setAGain(int indexGain, int value);
    void setBGain(int indexGain, int value);
    void setAOffset(int indexOffset, int value);
    void setBOffset(int indexOffset, int value);

    void setAExposureR(int value);
    void setAExposureG(int value);
    void setAExposureB(int value);
    void setAExposureUV(int value);

    void setBExposureR(int value);
    void setBExposureG(int value);
    void setBExposureB(int value);
    void setBExpousreUV(int value);

    void setSp(int value);
    int getSp();

    void EnableTest(bool bTest);
    int IsTest();

    void setColorMode(int mode);
    int getColorMode();

    void setDpi(int dpi);
    int getDpi();

    void setSample(int sample);
    int getSample();

    //20190626 YHP autoTrig function
    void setDelayTime(int value);
    void setTrigMode(bool isArmMode);

    bool update();
    void enableJamCheck(bool b);
    void resetADC();
    virtual bool write(unsigned int addr, unsigned int val);
    virtual bool read(unsigned int addr, unsigned int& val);

    bool is_ok(void);

private:
    FpgaParams fpgaParams;
    std::shared_ptr<IRegsAccess> m_regsAccess;
};