495 lines
11 KiB
C++
495 lines
11 KiB
C++
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//
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// Created by Nick on 2019/4/7.
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//
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#include "FpgaComm.h"
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#include <thread>
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#include "uartregsaccess.h"
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#include "config.h"
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#include <iostream>
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#define Reg(x) (fpgaParams.x)
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#define RegIndex(x) (std::distance((unsigned int *)&fpgaParams, (unsigned int *)&fpgaParams.x))
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#define ReadReg(x) read(RegIndex(x), *((unsigned int *)&fpgaParams.x))
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#define WriteReg(x) write(RegIndex(x), *((unsigned int *)&fpgaParams.x))
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#define WR_Reg(x) (WriteReg(x), ReadReg(x))
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#define CO(x) std::cout << #x << " : " << RegIndex(x) << std::endl
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FpgaComm::FpgaComm()
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{
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m_regsAccess.reset(new UartRegsAccess(FPGA_UART, 921600, 0x03, 0x83));
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// update(0);
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// Reg(AledR).sample = 256;
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// WR_Reg(AledR);
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}
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void FpgaComm::regsAccess_reset(bool enable)
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{
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if (enable)
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{
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if (!m_regsAccess.get())
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m_regsAccess.reset(new UartRegsAccess(FPGA_UART, 921600, 0x03, 0x83));
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return;
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}
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if (m_regsAccess.get())
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m_regsAccess.reset();
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}
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bool FpgaComm::read(unsigned int addr, unsigned int &val)
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{
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if (m_regsAccess.get())
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return m_regsAccess->read(addr, val);
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return false;
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}
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bool FpgaComm::write(unsigned int addr, unsigned int val)
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{
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if (m_regsAccess.get())
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return m_regsAccess->write(addr, val);
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return false;
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}
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void FpgaComm::setFrameHeight(int height)
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{
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Reg(frame).height = height;
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WR_Reg(frame);
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}
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int FpgaComm::getFrameHeight()
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{
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return Reg(frame).height;
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}
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void FpgaComm::setFrameNum(int num)
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{
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Reg(frame).num = num;
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WR_Reg(frame);
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}
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void FpgaComm::enableLed(bool bEnable)
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{
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Reg(AledR).ledEnable = bEnable;
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WR_Reg(AledR);
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#ifdef HAS_UV
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Reg(BledR).ledEnable = bEnable;
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WR_Reg(BledR);
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#else
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Reg(BledR).ledEnable = !bEnable;
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WR_Reg(BledR);
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#endif
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}
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void FpgaComm::enableUV(bool enable)
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{
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#ifdef HAS_UV
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isUVEnable = enable;
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Reg(BledR).ledEnable = isUVEnable;
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WR_Reg(BledR);
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#endif
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}
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void FpgaComm::capture()
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{
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ReadReg(cmd);
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Reg(cmd).cmd = 0;
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WriteReg(cmd);
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Reg(cmd).cmd = 1;
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WriteReg(cmd);
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}
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int FpgaComm::getRegs(int addr)
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{
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return fpgaParams.regs[addr];
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}
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void FpgaComm::setRegs(int addr, int value)
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{
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fpgaParams.regs[addr] = value;
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write(addr, value);
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read(addr, fpgaParams.regs[addr]);
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}
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void FpgaComm::setAGain(int indexGain, int value)
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{
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int index = indexGain;
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int val; // = value
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value >= 511 ? val = 511 : val = value;
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index++;
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fpgaParams.Aad.ad0_addr = index * 2;
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fpgaParams.Aad.ad1_addr = fpgaParams.Aad.ad0_addr + 1;
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fpgaParams.Aad.ad0_value = val;
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fpgaParams.Aad.ad1_value = val > 255 ? 1 : 0;
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fpgaParams.Aad.ad0_rw = 0;
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fpgaParams.Aad.ad1_rw = 0;
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write(0x04, *(int *)&fpgaParams.Aad);
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Reg(mode).adcA = 1;
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WriteReg(mode);
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Reg(mode).adcA = 0;
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WriteReg(mode);
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}
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void FpgaComm::setBGain(int indexGain, int value)
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{
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int index = indexGain;
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int val; // = value
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value >= 511 ? val = 511 : val = value;
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index++;
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fpgaParams.Bad.ad0_addr = index * 2;
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fpgaParams.Bad.ad1_addr = index * 2 + 1;
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fpgaParams.Bad.ad0_value = val;
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fpgaParams.Bad.ad1_value = val > 255 ? 1 : 0;
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fpgaParams.Bad.ad0_rw = 0;
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fpgaParams.Bad.ad1_rw = 0;
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write(0x07, *(int *)&fpgaParams.Bad);
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Reg(mode).adcB = 1;
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WriteReg(mode);
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Reg(mode).adcB = 0;
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WriteReg(mode);
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}
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void FpgaComm::setAOffset(int indexOffset, int value)
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{
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Reg(Aad).ad0_rw = 0;
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Reg(Aad).ad1_rw = 0;
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Reg(Aad).ad0_addr = indexOffset + 0x0e;
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Reg(Aad).ad1_addr = 0x14;
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Reg(Aad).ad0_value = value;
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WriteReg(Aad);
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Reg(mode).adcA = 1;
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WriteReg(mode);
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Reg(mode).adcA = 0;
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WriteReg(mode);
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}
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void FpgaComm::setBOffset(int indexOffset, int value)
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{
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Reg(Bad).ad0_rw = 0;
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Reg(Bad).ad1_rw = 0;
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Reg(Bad).ad0_addr = indexOffset + 0x0e;
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Reg(Bad).ad1_addr = 0x14;
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Reg(Bad).ad0_value = value;
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WriteReg(Bad);
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Reg(mode).adcB = 1;
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WriteReg(mode);
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Reg(mode).adcB = 0;
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WriteReg(mode);
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}
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void FpgaComm::setAExposureR(int value)
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{
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Reg(AledR).ledR = value;
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WR_Reg(AledR);
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}
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void FpgaComm::setAExposureG(int value)
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{
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Reg(AledGB).ledG = value;
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WR_Reg(AledGB);
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}
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void FpgaComm::setAExposureB(int value)
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{
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Reg(AledGB).ledB = value;
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WR_Reg(AledGB);
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}
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void FpgaComm::setAExposureUV(int value)
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{
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#ifdef HAS_UV
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Reg(UVLed).ledASide = value;
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WR_Reg(UVLed);
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#endif
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}
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void FpgaComm::setBExposureR(int value)
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{
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Reg(BledR).ledR = value;
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WR_Reg(BledR);
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}
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void FpgaComm::setBExposureG(int value)
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{
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Reg(BledGB).ledG = value;
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WR_Reg(BledGB);
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}
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void FpgaComm::setBExposureB(int value)
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{
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Reg(BledGB).ledB = value;
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WR_Reg(BledGB);
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}
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void FpgaComm::setBExpousreUV(int value)
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{
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#ifdef HAS_UV
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Reg(UVLed).ledBSide = value;
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WR_Reg(UVLed);
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#endif
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}
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void FpgaComm::setSp(int value)
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{
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Reg(mode).sp = value;
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WR_Reg(mode);
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}
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int FpgaComm::getSp()
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{
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return Reg(mode).sp;
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}
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void FpgaComm::setColorMode(int mode)
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{
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Reg(mode).colorMode = mode;
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WR_Reg(mode);
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}
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int FpgaComm::getColorMode()
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{
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return Reg(mode).colorMode;
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}
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void FpgaComm::setSample(int sample)
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{
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Reg(mode).sample = sample;
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WR_Reg(mode);
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Reg(AledR).sample = sample;
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WR_Reg(AledR);
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}
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void FpgaComm::EnableTest(bool bTest)
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{
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Reg(mode).selftest = bTest;
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WR_Reg(mode);
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}
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int FpgaComm::IsTest()
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{
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return Reg(mode).selftest;
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}
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int FpgaComm::getSample()
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{
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return Reg(mode).sample;
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}
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void FpgaComm::setDpi(int dpi)
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{
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Reg(mode).dpi = dpi;
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WR_Reg(mode);
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}
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int FpgaComm::getDpi()
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{
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return Reg(mode).dpi;
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}
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// 20190626 YHP autoTrig function
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void FpgaComm::setTrigMode(bool isArmMode)
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{
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unsigned int tmp;
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read(0x0b, tmp);
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if (!isArmMode)
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{ // default value+ ARM MODE,bit27 =0;
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fpgaParams.TrigMode = tmp & 0XFBFFFFFF;
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}
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else
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{
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fpgaParams.TrigMode = tmp | (1 << 26);
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}
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WR_Reg(TrigMode);
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}
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void FpgaComm::setDelayTime(int value)
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{
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// Reg(DelayTime) = value;
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// WR_Reg(DelayTime);
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}
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void FpgaComm::update(int times)
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{
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std::uint32_t tmp_reg = 0;
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for (int i = 0; i < 22; i++)
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{
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read(i, tmp_reg);
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printf("times[%d] reg[%d] = 0x%08x \n", times, i, tmp_reg);
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}
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}
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void FpgaComm::enableJamCheck(bool b)
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{
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// Reg(BledR).user_define.led_sample.jamEnable = b;
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// WR_Regs(0x08);
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}
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void FpgaComm::resetADC()
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{
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fpgaParams.Aad.ad0_rw = 0;
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fpgaParams.Aad.ad0_addr = 0;
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fpgaParams.Aad.ad0_value = 0;
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fpgaParams.Aad.ad1_rw = 0;
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fpgaParams.Aad.ad1_addr = 0;
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fpgaParams.Aad.ad1_value = 0;
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WR_Reg(Aad);
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fpgaParams.mode.adcA = 1;
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WR_Reg(mode);
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fpgaParams.mode.adcA = 0;
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WR_Reg(mode);
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fpgaParams.Bad.ad0_rw = 0;
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fpgaParams.Bad.ad0_addr = 0;
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fpgaParams.Bad.ad0_value = 0;
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fpgaParams.Bad.ad1_rw = 0;
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fpgaParams.Bad.ad1_addr = 0;
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fpgaParams.Bad.ad1_value = 0;
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WR_Reg(Bad);
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fpgaParams.mode.adcB = 1;
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WR_Reg(mode);
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fpgaParams.mode.adcB = 0;
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WR_Reg(mode);
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std::this_thread::sleep_for(std::chrono::milliseconds(100));
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fpgaParams.Aad.ad0_rw = 0;
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fpgaParams.Aad.ad0_addr = 0;
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fpgaParams.Aad.ad0_value = 7;
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fpgaParams.Aad.ad1_rw = 0;
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fpgaParams.Aad.ad1_addr = 0;
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fpgaParams.Aad.ad1_value = 7;
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WR_Reg(Aad);
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fpgaParams.mode.adcA = 1;
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WR_Reg(mode);
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fpgaParams.mode.adcA = 0;
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WR_Reg(mode);
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fpgaParams.Bad.ad0_rw = 0;
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fpgaParams.Bad.ad0_addr = 0;
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fpgaParams.Bad.ad0_value = 7;
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fpgaParams.Bad.ad1_rw = 0;
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fpgaParams.Bad.ad1_addr = 0;
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fpgaParams.Bad.ad1_value = 7;
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WR_Reg(Bad);
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fpgaParams.mode.adcB = 1;
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WR_Reg(mode);
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fpgaParams.mode.adcB = 0;
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WR_Reg(mode);
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fpgaParams.Aad.ad0_rw = 0;
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fpgaParams.Aad.ad0_addr = 1;
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fpgaParams.Aad.ad0_value = 0x50;
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fpgaParams.Aad.ad1_rw = 0;
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fpgaParams.Aad.ad1_addr = 1;
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fpgaParams.Aad.ad1_value = 0x50;
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WR_Reg(Aad);
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fpgaParams.mode.adcA = 1;
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WR_Reg(mode);
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fpgaParams.mode.adcA = 0;
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WR_Reg(mode);
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fpgaParams.Bad.ad0_rw = 0;
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fpgaParams.Bad.ad0_addr = 1;
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fpgaParams.Bad.ad0_value = 0x50;
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fpgaParams.Bad.ad1_rw = 0;
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fpgaParams.Bad.ad1_addr = 1;
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fpgaParams.Bad.ad1_value = 0x50;
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WR_Reg(Bad);
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fpgaParams.mode.adcB = 1;
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WR_Reg(mode);
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fpgaParams.mode.adcB = 0;
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WR_Reg(mode);
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}
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void FpgaComm::setEnTestCol(bool en)
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{
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Reg(AledR).en_test_color = en ? 1 : 0;
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WR_Reg(AledR);
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}
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void FpgaComm::setEnTestBit(bool en)
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{
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Reg(AledR).en_test = en ? 1 : 0;
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WR_Reg(AledR);
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}
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void FpgaComm::setVsp(unsigned int Aside, unsigned int BSide)
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{
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CISVSP vsp;
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vsp.bits.ASide_VSP = Aside;
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vsp.bits.BSide_VSP = BSide;
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vsp.bits.reserved = 0;
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printf("setVsp A side =%d B side=%d vspint=%08x \n", vsp.bits.ASide_VSP, vsp.bits.BSide_VSP, vsp.value);
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m_regsAccess->write(13, vsp.value);
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}
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void FpgaComm::setFrame_interval_min(int min)
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{
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fpgaParams.FrameInterval.Frame_Interval_min = min;
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fpgaParams.FrameInterval.reversed = 0;
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WR_Reg(FrameInterval);
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}
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int FpgaComm::getFrame_interval_min()
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{
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uint32_t value = 0;
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fpgaParams.FrameInterval.reversed = 0;
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read(0x0c, value);
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fpgaParams.FrameInterval = *(CisFrameInterval *)&value;
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return fpgaParams.FrameInterval.Frame_Interval_min;
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}
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void FpgaComm::setFrame_interval_max(int max)
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{
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fpgaParams.FrameInterval.Frame_Interval_max = max;
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fpgaParams.FrameInterval.reversed = 0;
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WR_Reg(FrameInterval);
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}
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int FpgaComm::getFrame_interval_max()
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{
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uint32_t value = 0;
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fpgaParams.FrameInterval.reversed = 0;
|
||
|
read(0x0c, value);
|
||
|
fpgaParams.FrameInterval = *(CisFrameInterval *)&value;
|
||
|
return fpgaParams.FrameInterval.Frame_Interval_max;
|
||
|
}
|
||
|
|
||
|
unsigned int FpgaComm::getFrame_counter_val()
|
||
|
{
|
||
|
uint32_t crt_frame_count = 0;
|
||
|
uint32_t reg8 = 0;
|
||
|
|
||
|
read(8, reg8);
|
||
|
// write(8,reg8 & 0x8);
|
||
|
// std::this_thread::sleep_for(std::chrono::milliseconds(2));
|
||
|
write(8, reg8 & 0xfffffff7); // off stop snap
|
||
|
read(8, reg8);
|
||
|
// std::this_thread::sleep_for(std::chrono::milliseconds(2));
|
||
|
read(0x10, crt_frame_count);
|
||
|
|
||
|
if (crt_frame_count & 0xffff <= 0)
|
||
|
{
|
||
|
for (int i = 0; i < 3; i++)
|
||
|
{
|
||
|
read(0x10, crt_frame_count);
|
||
|
printf("try %d times read frame count,frame_count = %d \n", i, crt_frame_count);
|
||
|
if (crt_frame_count & 0xffff > 0)
|
||
|
break;
|
||
|
}
|
||
|
}
|
||
|
write(8, reg8 | 0x8); // on reset counter
|
||
|
// std::this_thread::sleep_for(std::chrono::milliseconds(2));
|
||
|
// printf("TWO height reg[14] = %d reg[16] = %d \n", read(14) & 0xffff,read(16));
|
||
|
return crt_frame_count & 0xffff;
|
||
|
}
|
||
|
|
||
|
int FpgaComm::getFrameNum()
|
||
|
{
|
||
|
return fpgaParams.frame.num;
|
||
|
}
|
||
|
|
||
|
void FpgaComm::set_cis_type(bool isA3_CIS)
|
||
|
{
|
||
|
fpgaParams.AledR.cis_type = isA3_CIS ? 1 : 0;
|
||
|
}
|
||
|
|
||
|
void FpgaComm::set_8478_type(bool is_HL)
|
||
|
{
|
||
|
ReadReg(cmd);
|
||
|
Reg(cmd).cis_HL = is_HL;
|
||
|
WriteReg(cmd);
|
||
|
}
|