mirror of http://192.168.1.51:8099/lmh188/twain3.0
169 lines
4.8 KiB
C
169 lines
4.8 KiB
C
|
#pragma once
|
|||
|
#define FLASH_ADDR_START (0x300000) //!<DSP <20><>ȡflash<73><68>ʼ<EFBFBD><CABC>ַ
|
|||
|
|
|||
|
#define CONT_ADDR (FLASH_ADDR_START) //!< ָ<><D6B8>flash<73>洢<EFBFBD><E6B4A2><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ 4<>ֽڴ洢ɨ<E6B4A2><C9A8><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD>ռ<EFBFBD>4<EFBFBD>ֽ<EFBFBD>
|
|||
|
#define PID_ADDR (CONT_ADDR+4) //!<CONT_ADDR<44><52><EFBFBD><EFBFBD>ƫ<EFBFBD><C6AB>4<EFBFBD>ֽ<EFBFBD> ָ<><D6B8>PID<49>洢λ<E6B4A2><CEBB> 2<>ֽڴ洢pid<69><64>unsigned short<72><74><EFBFBD>ͣ<EFBFBD>
|
|||
|
#define VID_ADDR (PID_ADDR+2) //!<PID_ADDR<44><52><EFBFBD><EFBFBD>ƫ<EFBFBD><C6AB>2<EFBFBD>ֽ<EFBFBD> ָ<><D6B8>VID_ADDR<44><EFBFBD>ַ 2<>ֽڴ洢vid <20><><EFBFBD><EFBFBD><EFBFBD>ռ<EFBFBD><D5BC><EFBFBD>С2<D0A1>ֽ<EFBFBD>
|
|||
|
#define DEVNAME_ADDR (VID_ADDR+2) //!<VID_ADDR<44><52><EFBFBD><EFBFBD>ƫ<EFBFBD><C6AB>2<EFBFBD>ֽ<EFBFBD> ָ<><D6B8>DEVNAME_ADDR<44><EFBFBD>ַ <20><><EFBFBD><EFBFBD><EFBFBD>ռ<EFBFBD><D5BC><EFBFBD>С64<36>ֽ<EFBFBD>
|
|||
|
#define SERIAL_ADDR (DEVNAME_ADDR+64) //!<DEVNAME_ADDR<44><52><EFBFBD><EFBFBD>ƫ<EFBFBD><C6AB>64<36>ֽ<EFBFBD> ָ<><D6B8><EFBFBD><EFBFBD><EFBFBD>к<EFBFBD>flash<73>洢<EFBFBD><E6B4A2>ַ <20><><EFBFBD><EFBFBD><EFBFBD>ռ<EFBFBD><D5BC><EFBFBD>С12<31>ֽ<EFBFBD>
|
|||
|
#define FWVERSION_ADDR (SERIAL_ADDR+12) //!<<3C>̼<EFBFBD><CCBC>汾<EFBFBD><E6B1BE> 8<>ֽ<EFBFBD>
|
|||
|
#define MOTORBOARD_CONFIG_ADDR (FWVERSION_ADDR+8) //!<SERIAL_ADDRƫ<52><C6AB>12<31>ֽ<EFBFBD> ָ<><D6B8> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>flash<73>洢<EFBFBD><E6B4A2><EFBFBD><EFBFBD>ͷ<EFBFBD><CDB7>ַ <20><><EFBFBD><EFBFBD><EFBFBD>ռ<EFBFBD>3<EFBFBD>ֽ<EFBFBD>
|
|||
|
#define EXPOSURE_ADDR_200DPI (MOTORBOARD_CONFIG_ADDR+3) //!<MOTORBOARD_CONFIG_ADDRƫ<52><C6AB>8<EFBFBD>ֽ<EFBFBD> ָ<><D6B8> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>flash<73>洢<EFBFBD>ع<EFBFBD><D8B9><EFBFBD><EFBFBD><EFBFBD>ͷ<EFBFBD><CDB7>ַ
|
|||
|
//!<<3C><><EFBFBD><EFBFBD><EFBFBD>ռ<EFBFBD>8<EFBFBD>ֽ<EFBFBD> <20>洢<EFBFBD>ռ<EFBFBD> <20>洢<EFBFBD><E6B4A2>ʽGray<61><79>2<EFBFBD><32>+B<><42>2<EFBFBD><32>+G<><47>2<EFBFBD><32>+R<><52>2<EFBFBD><32>
|
|||
|
#define EXPOSURE_ADDR_300DPI (EXPOSURE_ADDR_200DPI+2)
|
|||
|
#define AD_ADDR_200DPI (EXPOSURE_ADDR_300DPI+2) //!<EXPOSURE_ADDR
|
|||
|
#define AD_ADDR_300DPI (AD_ADDR_200DPI+28)
|
|||
|
#define FPGA_FLAT_ADDR_200DPI_GRAY (AD_ADDR_300DPI+28) //<2F><><EFBFBD><EFBFBD>+<2B>ڳ<EFBFBD><DAB3><EFBFBD><EFBFBD>ݣ<EFBFBD>2448+2448<34><38>+<2B><><EFBFBD><EFBFBD>+<2B>ڳ<EFBFBD><DAB3><EFBFBD><EFBFBD>ݣ<EFBFBD>2448+2448<34><38>
|
|||
|
#define FPGA_FLAT_ADDR_200DPI_COLOR (FPGA_FLAT_ADDR_200DPI_GRAY+2448*4)//<2F><><EFBFBD><EFBFBD>RGB+<2B>ڳ<EFBFBD><DAB3><EFBFBD><EFBFBD>ݣ<EFBFBD>2448+2448+2448+2448<34><38>+<2B><><EFBFBD><EFBFBD>+<2B>ڳ<EFBFBD><DAB3><EFBFBD><EFBFBD><EFBFBD>RGB+<2B>ڳ<EFBFBD><DAB3><EFBFBD><EFBFBD>ݣ<EFBFBD>2448+2448+2448+2448<34><38>
|
|||
|
#define FPGA_FLAT_ADDR_300DPI_GRAY (FPGA_FLAT_ADDR_200DPI_COLOR+2448*8)
|
|||
|
#define FPGA_FLAT_ADDR_300DPI_COLOR (FPGA_FLAT_ADDR_300DPI_GRAY+3672*4)
|
|||
|
|
|||
|
//#define FPGA_FLAT_ADDR (AD_ADDR+28) //!<<3C><><EFBFBD><EFBFBD><EFBFBD>ռ<EFBFBD>918+612<31>ֽ<EFBFBD>
|
|||
|
//flash size
|
|||
|
//#define FLASH_200_COLOR (2448 * 8)
|
|||
|
//#define FLASH_200_GRAY (2448*4)
|
|||
|
//#define ARRAY_200 (612)
|
|||
|
//#define ARRAY_300 (918)
|
|||
|
//#define FLASH_300_COLOR (3672 * 8)
|
|||
|
//#define FLASH_300_GRAY (3672)
|
|||
|
|
|||
|
#define FLASH_CONT_ADDR_SIZE (4)
|
|||
|
#define FLASH_PID_ADDR_SIZE (2)
|
|||
|
#define FLASH_VID_ADDR_SIZE (2)
|
|||
|
#define FLASH_DEVNAME_ADDR_SIZE (64)
|
|||
|
#define FLASH_SERIAL_ADDR_SIZE (12)
|
|||
|
#define FLASH_FWVERSION_ADDR_SIZE (8)
|
|||
|
#define FLASH_MOTORBOARD_CONFIG_ADDR_SIZE (3<><33>
|
|||
|
#define FLASH_AD_ADDR_SIZE (28)
|
|||
|
#define FLASH_FPGA_FLAT_ADDR_200DPI_GRAY_SIZE (2448*4)
|
|||
|
#define FLASH_FPGA_FLAT_ADDR_200DPI_COLOR_SIZE (2448*8)
|
|||
|
#define FLASH_FPGA_FLAT_ADDR_300DPI_GRAY_SIZE (3672*4)
|
|||
|
#define FLASH_FPGA_FLAT_ADDR_300DPI_COLOR_SIZE (3672*8)
|
|||
|
|
|||
|
typedef enum {
|
|||
|
Cmd_None,
|
|||
|
Cmd_Line_Count,
|
|||
|
Cmd_Mode_Freque,
|
|||
|
Cmd_Ad_Front,
|
|||
|
Cmd_Ad_Back,
|
|||
|
Cmd_Exposure_Back1,
|
|||
|
Cmd_Exposure_Back2,
|
|||
|
Cmd_Exposure_Front1,
|
|||
|
Cmd_Exposure_Front2,
|
|||
|
Cmd_Start,
|
|||
|
Cmd_Stop,
|
|||
|
Cmd_Status,
|
|||
|
Cmd_Width,
|
|||
|
Cmd_Sensor_Count_Channel,
|
|||
|
Cmd_Dma_Status,
|
|||
|
Cmd_Dma_Stransfer,
|
|||
|
Cmd_Dma_Size,
|
|||
|
Cmd_Num
|
|||
|
} FPGA_CMD;
|
|||
|
|
|||
|
typedef enum
|
|||
|
{
|
|||
|
MAIN_BOARD,
|
|||
|
MOTOR_BOARD,
|
|||
|
USERDEFINE,
|
|||
|
IMAGEREGS,
|
|||
|
BOARDFLAGNUM
|
|||
|
} BOARD_FLAG;
|
|||
|
|
|||
|
|
|||
|
typedef enum User_Define_Regs
|
|||
|
{
|
|||
|
ModeParam,
|
|||
|
WriteCorrectData,
|
|||
|
ReadCorrectData,
|
|||
|
BulkInOn
|
|||
|
} UserDefineRegs;
|
|||
|
|
|||
|
typedef union Motor_Setting {
|
|||
|
unsigned int value;
|
|||
|
struct {
|
|||
|
unsigned int scan_enable : 1;
|
|||
|
unsigned int dpi : 1;
|
|||
|
unsigned int paper : 1;
|
|||
|
unsigned int double_paper : 1;
|
|||
|
unsigned int staple_enable : 1;
|
|||
|
unsigned int error_clean : 1;
|
|||
|
unsigned int status_init : 1;
|
|||
|
unsigned int pick_paper : 1;
|
|||
|
unsigned int skew_enable : 1;
|
|||
|
unsigned int skew_parameter : 3;
|
|||
|
unsigned int key_staple_enable : 1;
|
|||
|
unsigned int iic_config_addr : 7;
|
|||
|
unsigned int iic_config : 1;
|
|||
|
unsigned int v_setting : 2;
|
|||
|
unsigned int speed_set_enable : 1;
|
|||
|
unsigned int scan_busy_motor_stop : 1;
|
|||
|
unsigned int papar_type : 4;
|
|||
|
unsigned int color_model : 1;
|
|||
|
unsigned int reserve : 2;
|
|||
|
};
|
|||
|
} MotorSetting;
|
|||
|
|
|||
|
typedef union Motor_Status {
|
|||
|
unsigned int value;
|
|||
|
struct {
|
|||
|
unsigned int scan_pulse : 1;
|
|||
|
unsigned int m1_paper_sin : 1;
|
|||
|
unsigned int open_machine : 1;
|
|||
|
unsigned int pick_failed : 1;
|
|||
|
unsigned int stop_jam : 1;
|
|||
|
unsigned int double_paper : 1;
|
|||
|
unsigned int staple : 1;
|
|||
|
unsigned int papertilted : 1;
|
|||
|
unsigned int count_pulse : 1;
|
|||
|
unsigned int scan_mode_change : 1;
|
|||
|
unsigned int motor_status : 1;
|
|||
|
unsigned int keep_last_paper : 1;
|
|||
|
};
|
|||
|
} MotorStatus;
|
|||
|
|
|||
|
typedef union Motor_Mode {
|
|||
|
unsigned int value;
|
|||
|
struct {
|
|||
|
unsigned int scan_num : 14;
|
|||
|
unsigned int scan_mode : 2;
|
|||
|
unsigned int feeding_paper_ready : 1;
|
|||
|
unsigned int scan_status : 1;
|
|||
|
};
|
|||
|
} MotorMode;
|
|||
|
|
|||
|
typedef union Scan_Triger {
|
|||
|
unsigned int value;
|
|||
|
struct {
|
|||
|
unsigned int triger : 1;
|
|||
|
};
|
|||
|
} ScanTriger;
|
|||
|
|
|||
|
|
|||
|
typedef enum Color_Mode
|
|||
|
{
|
|||
|
Gray = 0,
|
|||
|
Color = 1
|
|||
|
}ColorMode;
|
|||
|
|
|||
|
typedef enum Burst_Mode
|
|||
|
{
|
|||
|
SingleInternalTrigger = 1,
|
|||
|
SingleExternalTrigger,
|
|||
|
ContinuousInternalTrigger,
|
|||
|
ContinuousExternalTrigger,
|
|||
|
}BurstMode;
|
|||
|
|
|||
|
typedef union Reg_2Short {
|
|||
|
int value;
|
|||
|
struct {
|
|||
|
unsigned short short1;
|
|||
|
unsigned short short2;
|
|||
|
};
|
|||
|
struct
|
|||
|
{
|
|||
|
unsigned short val[2];
|
|||
|
};
|
|||
|
} Reg2Short;
|
|||
|
|